1. Field
This disclosure relates generally to integrated circuits, and more specifically, to an integrated circuit having a latch-up recovery circuit.
2. Related Art
The problem of “latch-up” in CMOS integrated circuits is well known. Latch-up is a condition caused by parasitic devices inherent in CMOS circuits that cause the CMOS circuit to enter a high current state. When the latch-up condition is entered, the CMOS circuit may remain in latch-up until power is removed. The high current can cause irreversible damage to the integrated circuit. The latch-up problem becomes greater as device geometries and circuit dimensions are scaled down.
Therefore, what is needed is a circuit that solves the above problems.